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C/C++ Source or Header  |  1992-12-19  |  5.8 KB  |  198 lines
  1. /*
  2.  * vmSunConst.h --
  3.  *
  4.  *         Virtual memory constants for the PMAX.  See the "R2000 Risc
  5.  *    Architecture" manual or the "PMAX Desktop Workstation Functional
  6.  *    Specification" for the definitions of these constants.
  7.  *
  8.  * Copyright (C) 1989 Digital Equipment Corporation.
  9.  * Permission to use, copy, modify, and distribute this software and
  10.  * its documentation for any purpose and without fee is hereby granted,
  11.  * provided that the above copyright notice appears in all copies.
  12.  * Digital Equipment Corporation makes no representations about the
  13.  * suitability of this software for any purpose.  It is provided "as is"
  14.  * without express or implied warranty.
  15.  *
  16.  * $Header: /cdrom/src/kernel/Cvsroot/kernel/vm/ds5000.md/vm3maxConst.h,v 9.2 92/10/26 12:01:44 elm Exp $ SPRITE (DECWRL)
  17.  */
  18.  
  19. #ifndef _VMPMAXCONST
  20. #define _VMPMAXCONST
  21.  
  22. /*
  23.  * The low part of the TLB entry.
  24.  */
  25. #define VMMACH_TLB_PF_NUM        0xfffff000
  26. #define VMMACH_TLB_NON_CACHEABLE_BIT    0x00000800
  27. #define VMMACH_TLB_MOD_BIT        0x00000400
  28. #define VMMACH_TLB_VALID_BIT        0x00000200
  29. #define VMMACH_TLB_GLOBAL_BIT        0x00000100
  30.  
  31. #define VMMACH_TLB_ENTRY_WRITEABLE    0x00000080
  32.  
  33. #define VMMACH_TLB_PHYS_PAGE_SHIFT    12
  34.  
  35. /*
  36.  * The high part of the TLB entry.
  37.  */
  38. #define VMMACH_TLB_VIRT_PAGE_NUM    0xfffff000
  39. #define VMMACH_TLB_PID            0x00000fc0
  40. #define VMMACH_TLB_PID_SHIFT        6
  41.  
  42. #define VMMACH_TLB_VIRT_PAGE_SHIFT    12
  43.  
  44. /*
  45.  * The shift to put the index in the right spot.
  46.  */
  47. #define VMMACH_TLB_INDEX_SHIFT        8
  48.  
  49. /*
  50.  * The cache block size. This is a guess.
  51.  */
  52. #define VMMACH_CACHE_LINE_SIZE        32
  53.  
  54. /*
  55.  * Size of the cache.
  56.  */
  57. #define VMMACH_CACHE_SIZE 0x10000
  58.  
  59. /*
  60.  * Number of cache lines.
  61.  */
  62. #define VMMACH_NUM_CACHE_LINES    (VMMACH_CACHE_SIZE / VMMACH_CACHE_LINE_SIZE)
  63.  
  64. /*
  65.  * Hardware dependent constants for pages and segments:
  66.  *
  67.  * VMMACH_CLUSTER_SIZE        The number of hardware pages per virtual page.
  68.  * VMMACH_CLUSTER_SHIFT        The log base 2 of VMMACH_CLUSTER_SIZE.
  69.  * VMMACH_PAGE_SIZE        The size of each virtual page.
  70.  * VMMACH_PAGE_SIZE_INT        The size of each hardware page.
  71.  * VMMACH_PAGE_SHIFT        The log base 2 of VMMACH_PAGE_SIZE.
  72.  * VMMACH_PAGE_SHIFT_INT    The log base 2 of VMMACH_MACH_PAGE_SIZE.
  73.  * VMMACH_OFFSET_MASK        Mask to get to the offset of a virtual address.
  74.  * VMMACH_OFFSET_MASK_INT    Mask to get to the offset of a virtual address.
  75.  * VMMACH_PAGE_MASK        Mask to get to the Hardware page number within a
  76.  *                hardware segment.
  77.  * VMMACH_SEG_SIZE        The size of each hardware segment.
  78.  * VMMACH_SEG_SHIFT        The log base 2 of VMMACH_SEG_SIZE.
  79.  * VMMACH_NUM_PAGES_PER_SEG    The number of virtual pages per segment.
  80.  */
  81.  
  82. #define    VMMACH_CLUSTER_SIZE    1
  83. #define    VMMACH_CLUSTER_SHIFT    0
  84. #define    VMMACH_PAGE_SIZE    (VMMACH_CLUSTER_SIZE * VMMACH_PAGE_SIZE_INT)
  85. #define    VMMACH_PAGE_SIZE_INT    4096
  86. #define VMMACH_PAGE_SHIFT    (VMMACH_CLUSTER_SHIFT + VMMACH_PAGE_SHIFT_INT)
  87. #define VMMACH_PAGE_SHIFT_INT    12
  88. #define VMMACH_OFFSET_MASK    0xfff
  89. #define VMMACH_OFFSET_MASK_INT    0xfff
  90.  
  91. /*
  92.  * The size that page tables are to be allocated in.  This grows software
  93.  * segments in 256K chunks.
  94.  */
  95. #define    VMMACH_PAGE_TABLE_INCREMENT    64
  96.  
  97. /*
  98.  * How the VAS is partitioned.
  99.  */
  100. #define VMMACH_KUSEG_START        0
  101. #define VMMACH_PHYS_CACHED_START    0x80000000
  102. #define VMMACH_PHYS_CACHED_START_PAGE    0x80000
  103. #define VMMACH_PHYS_UNCACHED_START    0xa0000000
  104. #define VMMACH_VIRT_CACHED_START    0xc0000000
  105. #define VMMACH_VIRT_CACHED_START_PAGE    0xc0000
  106.  
  107. /*
  108.  * Where we map kernel pages into the user's address space.
  109.  */
  110. #define VMMACH_USER_SHARED_PAGES    8192
  111. #define VMMACH_SHARED_BLOCK_SIZE    0x20000
  112. #define VMMACH_SHARED_NUM_BLOCKS    (VMMACH_USER_SHARED_PAGES*VMMACH_PAGE_SIZE/VMMACH_SHARED_BLOCK_SIZE)
  113. #define VMMACH_USER_MAPPING_PAGES    512
  114. #define VMMACH_USER_MAPPING_BASE_ADDR    (VMMACH_PHYS_CACHED_START - (VMMACH_USER_MAPPING_PAGES*VMMACH_PAGE_SIZE))
  115. #define VMMACH_USER_MAPPING_BASE_PAGE    (VMMACH_PHYS_CACHED_START_PAGE - VMMACH_USER_MAPPING_PAGES)
  116. #define VMMACH_SHARED_START_ADDR    (VMMACH_USER_MAPPING_BASE_ADDR-VMMACH_USER_SHARED_PAGES*VMMACH_PAGE_SIZE)
  117.  
  118. /*
  119.  * Where the mapped page is at for cross address space copies.
  120.  */
  121. #define VMMACH_MAPPED_PAGE_ADDR        0xfffff000
  122. #define VMMACH_MAPPED_PAGE_NUM        0xfffff
  123.  
  124. /*
  125.  * The number of TLB entries and the first one that write random hits.
  126.  */
  127. #define VMMACH_NUM_TLB_ENTRIES        64
  128. #define VMMACH_FIRST_RAND_ENTRY     8
  129.  
  130. /*
  131.  * The number of process id entries.
  132.  */
  133. #define    VMMACH_NUM_PIDS            64
  134.  
  135. /*
  136.  * Invalid pid.
  137.  */
  138. #define    VMMACH_INV_PID        0
  139.  
  140. /*
  141.  * The kernel's pid.
  142.  */
  143. #define VMMACH_KERN_PID        1
  144.  
  145. /*
  146.  * TLB registers
  147.  */
  148. #define    VMMACH_TLB_INDEX    $0
  149. #define VMMACH_TLB_RANDOM    $1
  150. #define VMMACH_TLB_LOW        $2
  151. #define VMMACH_TLB_CONTEXT    $4
  152. #define VMMACH_BAD_VADDR    $8
  153. #define VMMACH_TLB_HI        $10
  154.  
  155. /*
  156.  * The maximum number of kernel stacks.
  157.  */
  158. #define    VMMACH_MAX_KERN_STACKS    256
  159.  
  160. /*
  161.  * TLB probe return codes.
  162.  */
  163. #define VMMACH_TLB_NOT_FOUND        0
  164. #define VMMACH_TLB_FOUND        1
  165. #define VMMACH_TLB_FOUND_WITH_PATCH    2
  166. #define VMMACH_TLB_PROBE_ERROR        3
  167.  
  168. /*
  169.  * TLB hash table values.
  170.  */
  171. #define VMMACH_LOW_REG_OFFSET        8
  172. #define VMMACH_HASH_KEY_OFFSET        12
  173. #define VMMACH_NUM_TLB_HASH_ENTRIES    8192
  174. #define VMMACH_PAGE_HASH_SHIFT        (VMMACH_PAGE_SHIFT - VMMACH_BUCKET_SIZE_SHIFT)
  175. #define VMMACH_PID_HASH_SHIFT        5
  176. #define VMMACH_BUCKET_SIZE_SHIFT    4
  177. #define VMMACH_HASH_MASK        0x1fff0
  178. #define VMMACH_HASH_MASK_2        0x1fff
  179.  
  180. /*
  181.  * TLB Hash table performance counters and place to save a temporary.  These
  182.  * values live in low memory just after the exception handlers.  They are
  183.  * in low memory so that they can be accessed quickly.
  184.  */
  185. #define VMMACH_STAT_BASE_OFFSET        0x100
  186. #define VMMACH_SAVED_AT_OFFSET        VMMACH_STAT_BASE_OFFSET + 0
  187. #define VMMACH_UTLB_COUNT_OFFSET    VMMACH_STAT_BASE_OFFSET + 4
  188. #define VMMACH_UTLB_HIT_OFFSET        VMMACH_STAT_BASE_OFFSET + 8
  189. #define VMMACH_MOD_COUNT_OFFSET        VMMACH_STAT_BASE_OFFSET + 12
  190. #define VMMACH_MOD_HIT_OFFSET        VMMACH_STAT_BASE_OFFSET + 16
  191.  
  192. /*
  193.  * Definitions for supporting the XBUS memory.
  194.  */
  195. #define VmMachIsXbusMem(addr) 0
  196.  
  197. #endif /* _VMPMAXCONST */
  198.